CPU Physical Design Engineer
Santa Clara, California, United States
Hardware
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Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level physical design.
Description
As a CPU Physical Design Engineer, you will drive or participate in the following:
• Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals
• Will be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield
• Will work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in CPU design
• Will work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability
• Will work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA
Minimum Qualifications
- Minimum BS and 3+ years of relevant industry experience
- Experience with digital circuits, timing/power concepts, and logic design
- Experience in Perl or TCL
Key Qualifications
Preferred Qualifications
- Experience in using industry standard logic Synthesis, PnR, STA and Power analysis tools along with floor-planning, pin-placement and timing budgeting
- Ability to work well in a team, self-motivated and excellent communication skills
Education & Experience
Additional Requirements
Pay & Benefits
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