8841876 FPGA Engineer - New York, NY
Job Information
ID :
#41280659
# of Positions :
15
Minimum Education Level :
Bachelor's Degree
Experience Required :
none
Salary :
$195000 - $235000 yearly
Duration :
Full Time Regular
Shift :
First Shift (Day)
Hours per week:
40
Job Description
Job Description:
FPGA Engineer positions offered by Citadel Securities Americas Services LLC (New York, NY). Research, design and implement ultra-low latency field-programmable gate array (FPGA) based custom financial trading systems in register transfer level (RTL) designs to provide hardware solutions for fast networking, high performance computing and real-time acceleration. Work with cross-functional teams to develop and implement proprietary hardware trading systems from conception to production. Build hardware architecture and perform RTL coding, simulation, system integration, hardware validation, verification module design and testing. Evaluate latency and throughput of designs while providing immediate feedback of operating designs. Create digital designs and verification to maximize the efficiency and performance of trading systems and to process vast amounts of data across trading systems.
Minimum Requirements:
Requires a Bachelor’s degree (or foreign equivalent) in Computer Science, Computer Engineering, Electrical Engineering or a related field. Education, training, or experience must include the following: Full FPGA system design lifecycle; FPGA systems research, design and implementation; RTL coding in Verilog, System Verilog or VHDL; Creating FPGA design flows; Network and system level protocols, packet based data processing and computer architecture; and, Working in Linux operating system.
We are offering a salary range of $195,000 to $235,000.
If interested, please submit resume and transcripts to citadelrecruitment@citadel.com. Reference Job ID: 8841876.
FPGA Engineer positions offered by Citadel Securities Americas Services LLC (New York, NY). Research, design and implement ultra-low latency field-programmable gate array (FPGA) based custom financial trading systems in register transfer level (RTL) designs to provide hardware solutions for fast networking, high performance computing and real-time acceleration. Work with cross-functional teams to develop and implement proprietary hardware trading systems from conception to production. Build hardware architecture and perform RTL coding, simulation, system integration, hardware validation, verification module design and testing. Evaluate latency and throughput of designs while providing immediate feedback of operating designs. Create digital designs and verification to maximize the efficiency and performance of trading systems and to process vast amounts of data across trading systems.
Minimum Requirements:
Requires a Bachelor’s degree (or foreign equivalent) in Computer Science, Computer Engineering, Electrical Engineering or a related field. Education, training, or experience must include the following: Full FPGA system design lifecycle; FPGA systems research, design and implementation; RTL coding in Verilog, System Verilog or VHDL; Creating FPGA design flows; Network and system level protocols, packet based data processing and computer architecture; and, Working in Linux operating system.
We are offering a salary range of $195,000 to $235,000.
If interested, please submit resume and transcripts to citadelrecruitment@citadel.com. Reference Job ID: 8841876.
Company Information
Name :
Description :
Investment firm
Type :
Direct Employer
Address :
425 Park Avenue
New York, NY 10022
New York, NY 10022
Application Information
Instructions :
If interested, please submit resume and transcripts to citadelrecruitment@citadel.com. Reference Job ID: 8841876.
Email :
Job Posting Entered On :
3/21/2025
Job Posting Expires On :
4/28/2025
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